main clock
英 [meɪn klɒk]
美 [meɪn klɑːk]
网络 主时钟; 相当于内存的主频
双语例句
- Real-time clock/ calendar IC is the main chip of the clock systematic unit in the micro-control system.
实时时钟/日历芯片是构成微控制系统里时钟系统单元的主芯片。 - The main method in design of signal collection circuit, temperature detection circuit, real-time clock circuit and the hardware and software of Profibus-DP interface module were described. And the algorithm and design of measurement and control software with multi-factors were given.
阐述了信号采集电路、温度检测与实时时钟电路、Profibus-DP总线接口模块硬件和软件的设计方法，以及多参数测控软件的算法和设计。 - The neat thing about this second clock is that it can override the main clock* and you should just flip into that new time zone in one day.
第二时钟最妙的地方就在于它可以覆盖我们的主时钟，也就是说你应该可以在一天之内将你的生物钟调整到一个新的时区。 - Our main products include door handle, floor spring, Center Clock of Glass Door, door closer, patch fitting, glass door hinge and stainless steel hinge etc.
主要产品有拉手、地弹簧、玻璃门中央锁、闭门器、门夹、玻璃合页及不锈合页等系列。 - The main spring of the alarm clock is broken.
闹钟的簧断了。 - We design the system from the investigation. The hard ware of the traffic signal control system bases on time distributing can divide into: main module, input and display module, clock module, output module, LED display module, memory module and communication module.
由调查结果得出系统所要实现的基本功能，按功能，将系统在硬件组成上分为主控模块、输入及显示模块、时钟模块、输出模块、放大模块、LED显示模块、存储模块、通讯模块。 - The main work include: 1. Analysis the chaos in the noise of atomic clock, thus, drew the conclusion that the operation state of atomic clock is related to environment condition. 2.
主要工作包括：1.分析了原子钟噪声中的混沌现象，表明环境条件对原子钟工作状态有很大影响。 - The write-operation of SDRAM is started by the output clock of image-sensor, and synchronized by the SDRAM main clock. The DSP is informed by CPLD when one frame image has been acquired.
图像缓存过程由DSP启动，在缓存过程中，SDRAM写操作首先被图像传感器的输出时钟触发，然后由SDRAM的主时钟进行同步，在一帧图像采集完成后CPLD通知DSP图像采集结束。 - Designed an oscillator which based on digital single-ended ring structure, whose main body merely consists of inverters and transfer-gates. The VCO can produce 8 clock signal which has same frequency and each adjacent phase difference is π 4.
采用全数字的单端环形压控振荡器电路，仅由反相器和传输门组成，可以产生8个频率相同的时钟信号，每个相邻信号的相位相差π4。 - The importance of the clock synchronization in the parallel distributed system is given, and three main methods for the clock synchronization are introduced.
叙述了并行分布式系统中时钟同步的重要性，并介绍了完成时钟同步的三种主要方法。